1. Field of the Invention
This invention relates to the field of semiconductor devices and more specifically to heteroepitaxial formation of gallium arsenide (GaAs) crystals on silicon substrates (GaAs-on-Si).
2. Prior Art
GaAs substrates are currently used in the manufacture of a variety of electronic devices such as very high speed integrated circuits (IC's) and photoelectronic devices, such as solar cells, light emitting diodes (LEDs) and lasers. GaAs IC's have the advantage of being higher speed than similar IC's fabricated on silicon wafers.
Disadvantages of utilizing GaAs substrates for semiconductor device manufacturing include the high cost of GaAs substrates, non-availability of large, cost effective substrates compared with available silicon substrates and fragility of GaAs substrates leading to a high breakage rate and consequently, low yield during manufacture.
Efforts have been made to epitaxially form GaAs on a silicon substrate (heteroepitaxy). The advantages of combining GaAs and silicon technologies are that very high speed GaAs electronic and photoelectronic devices may be fabricated using the low cost, large diameter and mechanically strong silicon substrates.
Some of the more significant problems inherent in the heteroepitaxial formation of GaAs on silicon are: 1) lattice parameter mismatch; and 2) thermal expansion mismatch. Lattice parameter mismatch refers to the difference in the lattice constant of the GaAs crystal compared with that of the silicon crystal. The lattice parameter mismatch leads to a high density of dislocation defects in approximately the first 0.1 micron of the GaAs layer. Thermal mismatch refers to the difference in the thermal expansion coefficient of GaAs compared with that of silicon. Because GaAs has a greater thermal expansion coefficient, it shrinks more than the silicon substrate during cool down from the high temperature formation of the GaAs layer, causing high tensile stress in the GaAs layer.
Another problem, silicon autodoping in the GaAs layer, results from the incorporation of silicon from the silicon substrate into the heteroepitaxially formed GaAs layer. Silicon acts as an n-type dopant in GaAs and a result of this unintended doping is that control of device characteristics becomes extremely difficult.
The mechanism of the silicon incorporation into the GaAs film is described in the prior art as diffusion of silicon from the silicon-GaAs interface (heterointerface). The extent of silicon incorporation in the GaAs layer is greater during high temperature growth and annealing processes. The diffusion of silicon into the GaAs layer is thought to be enhanced by preferential diffusion channels created by the high level of dislocation defects in the first 0.1 micron of the GaAs layer. Efforts to reduce the amount of unintended silicon doping in the GaAs layer have been to form the GaAs layer at low growth temperatures. However, low formation temperature processes result in lower quality GaAs crystal than that obtained from high temperature formation processes. High temperature formation is therefore preferred if silicon autodoping can be avoided. The problem of diffusion of silicon into the GaAs layer is discussed in "Heterointerface Stability in GaAs-on-Si Grown by Metalorganic Chemical Vapor Deposition" Applied Physics Letters, Vol. 51, No. 9 p. 682 (Aug. 31, 1987) and "Defect Related Si Diffusion in GaAs-on-Si" Applied Physics Letters, Vol. 53, No. 26 p. 2635 (Dec. 26, 1988).
The present invention is directed toward inhibiting the silicon autodoping in the GaAs layer.